1. Field of the Invention
The present invention relates to antifuse technology. More particularly, the present invention relates to a novel programmable read only memory cell fabricated using antifuse technology.
2. The Prior Art
In applications employing normal ONO antifuses having their lower electrodes disposed in the silicon substrate, substrate regions comprising lower antifuse electrodes have typically been doped to very high levels (i.e., 1e20) with arsenic, usually in the same masking step used to form source/drain diffusions for active devices in the substrate.
Programming antifuses often takes a large amount of current, in excess of 4 mA and as much as 15 mA if an output impedance of 250 ohms or less is desired in the programmed antifuse. This means that a rather large MOS transistor is required, as much as 20 .mu..
This large transistor size is rather prohibitive for programmable read only memory (PROM) cells. The tradeoff between on resistances of programmed antifuse PROM cells higher than 250 ohms and the need for such large select transistors has been unacceptable in the prior art.